1. Field of the Invention
The present invention relates to a display device, or more particularly, to a technology effectively applied to a data driver.
2. Background Art
Liquid crystal display modules are adopted as high-definition color monitors for computers or other information equipment or display devices for televisions.
The liquid crystal display module includes a so-called liquid crystal display panel having a liquid crystal layer sandwiched between two (a pair of) substrates at least one of which is made of transparent glass. A voltage is selectively applied to various electrodes for image formation which are formed on the substrates of the liquid crystal display panel, whereby predetermined subpixels are lit or extinguished. The liquid crystal display module is superior in a contrast and quickness in display.
In order to light or extinguish subpixels, data drivers and scan drivers are mounted on the flanks of the liquid crystal display panel.
The data driver generally includes a latch that latches display data items received externally and a decoder that converts the display data items, which have been latched into the latch, into video voltages (refer to, for example, patent document 1).
Incidentally, the patent document on a related art of the present invention is JP-A-2004-301946.
As far as the conventional data driver is concerned, when a video voltage (gray-scale voltage) is place on each video line, the video voltage is transmitted onto all video lines at the same timing. However, since the waveform of a scan signal differs between a pixel located near a scan signal input terminal coupled to a scanning line and a pixel located away from it, a time during which a thin-film transistor (TFT) that is an active element remains one varies. This poses a problem in that a video voltage writing time varies.
In order to solve the above problem, video lines are grouped into multiple blocks. The transmission timings of video signals to the respective blocks are differentiated (caused to lag), whereby non-uniformity in display or degradation in display quality, due to writing failure of data can be prevented.
However, the latch in the data driver comprehensively latches data items synchronously with a transmission timing control clock (CL1).
Therefore, when display data representing a succeeding display line has changed largely from display data representing a preceding line, since numerous circuits operate comprehensively, there arises a fear that a momentary current may be generated. The momentary current brings variation of a power supply voltage and thereby noise is superimposed to the power supply voltage, at the worst, there is a fear that display data may be lost or reliability may be impaired.